Power consumption is often a major concern in electronic systems, particularly in portable devices that are powered by batteries, such as laptop computers, netbook computers and smart phones. In addition to power consumption from functions such as display backlighting, such device may include integrated circuits, such as processors, that consume relatively large amounts of power during operation. For example, such integrated circuits may generate a multitude of clock signals that are used as time references for data processing, storage and transfer operations, and a relatively large amount of power may be expended in generating such clock signals. Such clock signals may also generate significant signal noise that may interfere with internal operations and operations of adjacent devices.
Clock control is a commonly used technique to reduce power consumption in integrated circuits. U.S. Pat. No. 7,076,681 to Bose et al., U.S. Pat. No. 7,065,665 to Jacobson et al., U.S. Patent Application Serial No. 2009/0300388 to Mantor et al., U.S. Pat. No. 7,605 to Chiang et al. and an article entitled “Adaptive Clock Gating Technique for Low-Power IP Core in SoC Design” by Chang et al. describes various clock control techniques.